Ball Grid Array (BGA) semiconductor package is characterized with a semiconductor chip being mounted on a front surface of a substrate and a grid array of solder balls being implanted on a back surface of the substrate, such that more I/O (input/output) connections can be incorporated within the same unit area of a chip carrier (e.g. the substrate) to satisfy a high-integration requirement for the semiconductor chip, and the entire package unit can be electrically connected to an external printed circuit board via the solder balls.
As a large amount of heat is produced during operation of the highly integrated semiconductor chip, to effectively dissipate the heat is important to assure the performance and lifetime of the semiconductor chip. However, since the semiconductor chip is usually encapsulated by an encapsulant made of a resin material having poor thermal conductivity (a coefficient of thermal conductivity thereof is only 0.8 w/m-k), the heat from the semiconductor chip cannot be effectively dissipated through the encapsulant, thereby causing unsatisfactory heat dissipating efficiency and adversely affecting the performance and lifetime of the semiconductor chip.
In order to improve the heat dissipating efficiency of the BGA semiconductor package, a thermally enhanced package incorporated with a heat dissipating structure has been proposed.
FIG. 1 shows a semiconductor package 1 disclosed by U.S. Pat. No. 5,726,079, wherein a heat spreader 11 is directly attached to a chip 10, and a top surface 11a of the heat spreader 11 is exposed to the atmosphere from an encapsulant 12 that encapsulates the chip 10, such that heat generated by the chip 10 can be transferred to the heat spreader 11 and dissipated to the atmosphere without passing through the encapsulant 12 having poor thermal conductivity.
However, several drawbacks are induced during fabrication of the semiconductor package 1. Firstly, after the heat spreader 11 is attached to the chip 10, the combined structure of heat spreader 11 and chip 10 is placed into a mold cavity of an encapsulation mold, and a molding process is performed to form the encapsulant 12. The top surface 11a of the heat spreader 11 should abut against a top wall of the mold cavity to allow the top surface 11a to be exposed after molding. If the top surface 11a of the heat spreader 11 fails to effectively abut against the top wall of the mold cavity but leaves gaps therebetween, the encapsulant 12 would flash to the top surface 11a of the heat spreader 11, and the flashes not only deteriorate the heat dissipating efficiency but also impair appearance of the fabricated product. As such, a deflashing process is usually required to remove the flashes, which however prolongs the fabrication time, increases the fabrication costs and possibly damages the fabricated product. On the other hand, if the heat spreader 11 abuts against the top wall of the mold cavity too closely, the fragile chip 10 may be cracked due to excessive pressure applied thereto.
In particular, when a distance between the top surface 11a of the heat spreader 11 and an upper surface of a substrate 13 mounted with the chip 10 is larger than a depth of the mold cavity, the heat spreader 11 is pressed by the encapsulation mold during the molding process such that the chip 10 directly in contact with the heat spreader 11 is cracked. On the contrary, when the distance between the top surface 11a of the heat spreader 11 and the upper surface of the substrate 13 is smaller than the depth of the mold cavity, the encapsulant 12 flashes to the top surface 11a of the heat spreader 11, and the flashes deteriorate the heat dissipating efficiency due to decrease in area of the top surface 11a of the heat spreader 11 exposed to the atmosphere, such that the deflashing process is additionally performed to remove the flashes from the heat spreader 11.
In order to make the distance between the top surface 11a of the heat spreader 11 and the upper surface of the substrate 13 equal to the depth of the mold cavity, the attachment between chip 10 and heat spreader 11 or substrate 13 and the thickness of heat spreader 11 should be precisely performed and controlled, respectively. The precision requirement however increases the packaging costs and process complexity in fabrication, thereby having difficulty in practical implementation.
As a height of the combined structure of heat spreader 11 and chip 10 should be precisely controlled, a batch-type method is not suitably applied for attaching the heat spreader 11 to the chip 10 during fabrication of the semiconductor package 1. Thereby, the heat spreader 11 must be attached to the corresponding chip 10 one by one, making process complexity and time consumption in fabrication increased and not favorable for cost reduction and improvement in packaging efficiency.
The heat dissipating efficiency of the semiconductor package 1 is proportional to the exposed area of the top surface 11a of the heat spreader 11. Under a condition with a constant size of the semiconductor package 1, the heat spreader 11 when having the same surface area as that of the semiconductor package 1 would have the maximum exposed area to provide the maximum heat dissipating efficiency. In order to make the heat spreader have the same surface area as that of the semiconductor package, sides of the heat spreader should be flush or engaged with side walls of the mold cavity during the molding process. However, if the heat spreader is oversized due to fabrication inaccuracy, it cannot be successfully placed into the mold cavity; otherwise, if the heat spreader is undersized, the encapsulant would easily flash to the top surface or sides of the heat spreader. This structural arrangement causes a yield concern and difficulty in fabrication.
In light of the foregoing drawbacks, U.S. Pat. Nos. 6,458,626 and 6,444,498 disclose a semiconductor package with a heat spreader being directly attached to a chip without causing chip cracking or flashes on an exposed surface of the heat spreader, as shown in FIGS. 2A to 2C and FIG. 3. In the semiconductor package, an interface layer 25 is formed on a surface, to be exposed to the atmosphere, of a heat spreader 21, and the interface layer 25 has poor adhesion with an encapsulant 24 or the heat spreader 21. Then, the heat spreader 21 is directly attached to a chip 20 mounted on a substrate 23. A molding process is performed to form an encapsulant 24 for encapsulating the heat spreader 21, the chip 20 and the interface layer 25 on the heat spreader 21 (as shown in FIG. 2A). In this case, the depth of a mold cavity of an encapsulation mold used in the molding process is larger than the combined thickness of chip 20 and heat spreader 21, such that the encapsulation mold does not come into contact with and press the heat spreader 21 to crack the chip 20 during molding. A singulation process is then performed (as shown in FIG. 2B), and the encapsulant 24 located above the heat spreader 21 is removed. If the adhesion between the heat spreader 21 and the interface layer 25 (such as a plated gold layer) is larger than the adhesion between the interface layer 25 and the encapsulant 24, the interface layer 25 remains on the heat spreader 21 after the encapsulant 24 located above the heat spreader 21 is removed. Due to the poor adhesion between the interface layer 25 and the encapsulant 24, no residue of the encapsulant 24 is left on the heat spreader 21 (as shown in FIG. 2C), thereby no flash problem. On the contrary, if the adhesion between the interface layer 25 (such as an adhesive tape made of polyimide resin) and the heat spreader 21 is smaller than the adhesion between the interface layer 25 and the encapsulant 24, the interface layer 25 is removed together with removal of the encapsulant 24 located above the heat spreader 21 (as shown in FIG. 3), such that no flash of the encapsulant 24 occurs on the heat spreader 21.
In the above semiconductor package, an adhesive layer 26 is applied between the chip 20 and the heat spreader 21 to effectively attach the heat spreader 21 to the chip 20, wherein the adhesive layer 26 is usually made of a thermal grease for improving the heat dissipating performance of the chip 20. A coefficient of thermal conductivity of the thermal grease is about 3 w/m-k, which is larger than that of the encapsulant (about 0.8 w/m-k) but much smaller than that of the heat spreader made of copper (about 400 w/m-k). Therefore, heat generated during operation of the chip is still transferred through the less thermally conductive thermal grease to the heat spreader and then dissipated to the atmosphere, such that thermal resistance is increased and disadvantageous for heat dissipation.
As shown in FIGS. 4A to 4C, U.S. Pat. No. 6,699,731 provides a semiconductor package with exposed chip, wherein a chip 40 is mounted on a substrate 43 and a module plate 41 is attached to the chip 40 via a tape 42. A molding process is performed to form an encapsulant 44 for encapsulating the module plate 41 and the chip 40 (as shown in FIG. 4A). Subsequently, a singulation process is performed (as shown in FIG. 4B), and the tape 42, the module plate 41 and the encapsulant 44 above the chip 40 are removed to form the semiconductor package with exposed chip. This allows heat generated during operation of the chip 40 to be directly dissipated to the atmosphere.
However, during practical fabrication of the above semiconductor package, when the tape 42 is removed from the chip 40, residues of an adhesive material of the tape 42 may easily remain on the encapsulant 44, which not only impair appearance of the fabricated product but also require an additional cleaning process, thereby undesirably making the overall packaging processes complicated and the fabrication costs increased.